GCC Code Coverage Report

Directory: src/drv/
File: src/drv/timer/src/timer_driver.c
Date: 2024-01-25 15:03:18
Exec Total Coverage
Lines: 0 269 0.0%
Branches: 0 66 0.0%
Line Branch Exec Source
1 /********************************************************************************************************//**
2 * @file timer_driver.c
3 *
4 * @brief File containing the APIs for configuring the TIM peripheral.
5 *
6 * Public Functions:
7 * - void Timer_Init(Timer_Handle_t* Timer_Handle)
8 * - void Timer_Start(Timer_Handle_t* Timer_Handle)
9 * - void Timer_Stop(Timer_Handle_t* Timer_Handle)
10 * - void Timer_ICInit(Timer_Handle_t* Timer_Handle, IC_Handle_t IC_Handle, CC_Channel_t channel)
11 * - uint32_t Timer_CCGetValue(Timer_Handle_t* Timer_Handle, CC_Channel_t channel)
12 * - void Timer_CCSetValue(Timer_Handle_t* Timer_Handle, CC_Channel_t channel, uint32_t value)
13 * - void Timer_PerClkCtrl(Timer_Num_t timer_num, uint8_t en_or_di)
14 * - void Timer_IRQHandling(Timer_Handle_t* Timer_Handle)
15 * - void Timer_ApplicationEventCallback(void)
16 *
17 * @note
18 * For further information about functions refer to the corresponding header file.
19 */
20
21 #include <stdint.h>
22 #include "timer_driver.h"
23 #include "stm32f446xx.h"
24
25 /***********************************************************************************************************/
26 /* Public API Definitions */
27 /***********************************************************************************************************/
28
29 ✗ void Timer_Init(Timer_Handle_t* Timer_Handle){
30
31 /* Enable peripheral clock */
32 ✗ Timer_PerClkCtrl(Timer_Handle->tim_num, ENABLE);
33 /* Clear and set prescaler value */
34 ✗ Timer_Handle->pTimer->PSC &= ~(0xFFFF << TIM_PSC);
35 ✗ Timer_Handle->pTimer->PSC |= (Timer_Handle->prescaler << TIM_PSC);
36 /*Clear and set period value */
37 /* TIM2 and TIM5 have 32 bits of counter capacity */
38 ✗ if((Timer_Handle->tim_num == TIMER2) || (Timer_Handle->tim_num == TIMER5)){
39 ✗ Timer_Handle->pTimer->ARR &= ~(0xFFFFFFFF << TIM_ARR);
40 ✗ Timer_Handle->pTimer->ARR |= (Timer_Handle->period << TIM_ARR);
41 }
42 /* Rest of the TIMx have 16 bits of counter capacity */
43 else{
44 ✗ Timer_Handle->pTimer->ARR &= ~(0xFFFF << TIM_ARR);
45 ✗ Timer_Handle->pTimer->ARR |= (uint16_t)(Timer_Handle->period << TIM_ARR);
46 }
47 /* Enable interrupt */
48 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_UIE);
49 }
50
51 ✗ void Timer_Start(Timer_Handle_t* Timer_Handle){
52
53 /* Clear UIF bit in SR register */
54 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_UIF);
55 /* Set counter enable */
56 ✗ Timer_Handle->pTimer->CR1 |= (1 << TIM_CR1_CEN);
57 }
58
59 ✗ void Timer_Stop(Timer_Handle_t* Timer_Handle){
60
61 /* Set counter disable */
62 ✗ Timer_Handle->pTimer->CR1 &= ~(1 << TIM_CR1_CEN);
63 }
64
65 ✗ void Timer_ICInit(Timer_Handle_t* Timer_Handle, IC_Handle_t IC_Handle, CC_Channel_t channel){
66
67 ✗ switch(channel){
68 ✗ case CHANNEL1:
69 /* Set polarity value */
70 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC1P);
71 ✗ Timer_Handle->pTimer->CCER |= (IC_Handle.ic_polarity << TIM_CCER_CC1P);
72 /* Set input capture selection */
73 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_CC1S);
74 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_select << TIM_CCMR1_CC1S);
75 /* Set input capture prescaler */
76 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_IC1PSC);
77 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_prescaler << TIM_CCMR1_IC1PSC);
78 /* Set input capture filter */
79 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x0F << TIM_CCMR1_IC1F);
80 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_filter << TIM_CCMR1_IC1F);
81 /* Enable interrupt */
82 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC1IE);
83 /* Enable capture/compare 1 channel */
84 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC1E);
85 ✗ break;
86 ✗ case CHANNEL2:
87 /* Set polarity value */
88 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC2P);
89 ✗ Timer_Handle->pTimer->CCER |= (IC_Handle.ic_polarity << TIM_CCER_CC2P);
90 /* Set input capture selection */
91 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_CC2S);
92 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_select << TIM_CCMR1_CC2S);
93 /* Set input capture prescaler */
94 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_IC2PSC);
95 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_prescaler << TIM_CCMR1_IC2PSC);
96 /* Set input capture filter */
97 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x0F << TIM_CCMR1_IC2F);
98 ✗ Timer_Handle->pTimer->CCMR1 |= (IC_Handle.ic_filter << TIM_CCMR1_IC2F);
99 /* Enable interrupt */
100 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC2IE);
101 /* Enable capture/compare 2 channel */
102 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC2E);
103 ✗ break;
104 ✗ case CHANNEL3:
105 /* Set polarity value */
106 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC3P);
107 ✗ Timer_Handle->pTimer->CCER |= (IC_Handle.ic_polarity << TIM_CCER_CC3P);
108 /* Set input capture selection */
109 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_CC3S);
110 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_select << TIM_CCMR2_CC3S);
111 /* Set input capture prescaler */
112 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_IC3PSC);
113 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_prescaler << TIM_CCMR2_IC3PSC);
114 /* Set input capture filter */
115 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x0F << TIM_CCMR2_IC3F);
116 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_filter << TIM_CCMR2_IC3F);
117 /* Enable interrupt */
118 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC3IE);
119 /* Enable capture/compare 3 channel */
120 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC3E);
121 ✗ break;
122 ✗ case CHANNEL4:
123 /* Set polarity value */
124 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC4P);
125 ✗ Timer_Handle->pTimer->CCER |= (IC_Handle.ic_polarity << TIM_CCER_CC4P);
126 /* Set input capture selection */
127 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_CC4S);
128 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_select << TIM_CCMR2_CC4S);
129 /* Set input capture prescaler */
130 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_IC4PSC);
131 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_prescaler << TIM_CCMR2_IC4PSC);
132 /* Set input capture filter */
133 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x0F << TIM_CCMR2_IC4F);
134 ✗ Timer_Handle->pTimer->CCMR2 |= (IC_Handle.ic_filter << TIM_CCMR2_IC4F);
135 /* Enable interrupt */
136 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC4IE);
137 /* Enable capture/compare 4 channel */
138 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC4E);
139 ✗ break;
140 ✗ default:
141 ✗ break;
142 }
143 }
144
145 ✗ uint32_t Timer_CCGetValue(Timer_Handle_t* Timer_Handle, CC_Channel_t channel){
146
147 ✗ uint32_t ret_val = 0;
148
149 ✗ switch(channel){
150 ✗ case CHANNEL1:
151 ✗ ret_val = Timer_Handle->pTimer->CCR1;
152 ✗ break;
153 ✗ case CHANNEL2:
154 ✗ ret_val = Timer_Handle->pTimer->CCR2;
155 ✗ break;
156 ✗ case CHANNEL3:
157 ✗ ret_val = Timer_Handle->pTimer->CCR3;
158 ✗ break;
159 ✗ case CHANNEL4:
160 ✗ ret_val = Timer_Handle->pTimer->CCR4;
161 ✗ break;
162 ✗ default:
163 ✗ break;
164 }
165
166 ✗ return ret_val;
167 }
168
169 ✗ void Timer_CCSetValue(Timer_Handle_t* Timer_Handle, CC_Channel_t channel, uint32_t value){
170
171 /* Disable timer */
172 ✗ Timer_Handle->pTimer->CR1 &= ~(1 << TIM_CR1_CEN);
173
174 ✗ switch(channel){
175 ✗ case CHANNEL1:
176 ✗ Timer_Handle->pTimer->CCR1 &= ~(0xFFFFFFFF);
177 ✗ Timer_Handle->pTimer->CCR1 |= value;
178 ✗ break;
179 ✗ case CHANNEL2:
180 ✗ Timer_Handle->pTimer->CCR2 &= ~(0xFFFFFFFF);
181 ✗ Timer_Handle->pTimer->CCR2 |= value;
182 ✗ break;
183 ✗ case CHANNEL3:
184 ✗ Timer_Handle->pTimer->CCR3 &= ~(0xFFFFFFFF);
185 ✗ Timer_Handle->pTimer->CCR3 |= value;
186 ✗ break;
187 ✗ case CHANNEL4:
188 ✗ Timer_Handle->pTimer->CCR4 &= ~(0xFFFFFFFF);
189 ✗ Timer_Handle->pTimer->CCR4 |= value;
190 ✗ break;
191 ✗ default:
192 ✗ break;
193 }
194
195 /* Enable timer */
196 ✗ Timer_Handle->pTimer->CR1 |= (1 << TIM_CR1_CEN);
197
198 }
199
200 ✗ void Timer_OCInit(Timer_Handle_t* Timer_Handle, OC_Handle_t OC_Handle, CC_Channel_t channel){
201
202 /* Disable update event interrupt */
203 ✗ Timer_Handle->pTimer->DIER &= ~(1 << TIM_DIER_UIE);
204
205 ✗ switch(channel){
206 ✗ case CHANNEL1:
207 /* Set polarity value */
208 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC1P);
209 ✗ Timer_Handle->pTimer->CCER |= (OC_Handle.oc_polarity << TIM_CCER_CC1P);
210 /* Set capture/compare selection as output */
211 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_CC1S);
212 /* Set output compare mode */
213 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x07 << TIM_CCMR1_OC1M);
214 ✗ Timer_Handle->pTimer->CCMR1 |= (OC_Handle.oc_mode << TIM_CCMR1_OC1M);
215 /* Set initial pulse value */
216 ✗ Timer_Handle->pTimer->CCR1 &= ~(0xFFFFFFFF);
217 ✗ Timer_Handle->pTimer->CCR1 |= OC_Handle.oc_pulse;
218 /* Enable preload */
219 ✗ Timer_Handle->pTimer->CCMR1 |= (OC_Handle.oc_preload << TIM_CCMR1_OC1PE);
220 /* Enable interrupt */
221 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC1IE);
222 /* Enable capture/compare 1 channel */
223 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC1E);
224 ✗ break;
225 ✗ case CHANNEL2:
226 /* Set polarity value */
227 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC2P);
228 ✗ Timer_Handle->pTimer->CCER |= (OC_Handle.oc_polarity << TIM_CCER_CC2P);
229 /* Set capture/compare selection as output */
230 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x03 << TIM_CCMR1_CC2S);
231 /* Set output compare mode */
232 ✗ Timer_Handle->pTimer->CCMR1 &= ~(0x07 << TIM_CCMR1_OC2M);
233 ✗ Timer_Handle->pTimer->CCMR1 |= (OC_Handle.oc_mode << TIM_CCMR1_OC2M);
234 /* Set initial pulse value */
235 ✗ Timer_Handle->pTimer->CCR2 &= ~(0xFFFFFFFF);
236 ✗ Timer_Handle->pTimer->CCR2 |= OC_Handle.oc_pulse;
237 /* Enable preload */
238 ✗ Timer_Handle->pTimer->CCMR1 |= (OC_Handle.oc_preload << TIM_CCMR1_OC2PE);
239 /* Enable interrupt */
240 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC2IE);
241 /* Enable capture/compare 2 channel */
242 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC2E);
243 ✗ break;
244 ✗ case CHANNEL3:
245 /* Set polarity value */
246 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC3P);
247 ✗ Timer_Handle->pTimer->CCER |= (OC_Handle.oc_polarity << TIM_CCER_CC3P);
248 /* Set capture/compare selection as output */
249 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_CC3S);
250 /* Set output compare mode */
251 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x07 << TIM_CCMR2_OC3M);
252 ✗ Timer_Handle->pTimer->CCMR2 |= (OC_Handle.oc_mode << TIM_CCMR2_OC3M);
253 /* Set initial pulse value */
254 ✗ Timer_Handle->pTimer->CCR3 &= ~(0xFFFFFFFF);
255 ✗ Timer_Handle->pTimer->CCR3 |= OC_Handle.oc_pulse;
256 /* Enable preload */
257 ✗ Timer_Handle->pTimer->CCMR2 |= (OC_Handle.oc_preload << TIM_CCMR2_OC3PE);
258 /* Enable interrupt */
259 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC3IE);
260 /* Enable capture/compare 3 channel */
261 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC3E);
262 ✗ break;
263 ✗ case CHANNEL4:
264 /* Set polarity value */
265 ✗ Timer_Handle->pTimer->CCER &= ~(0x05 << TIM_CCER_CC4P);
266 ✗ Timer_Handle->pTimer->CCER |= (OC_Handle.oc_polarity << TIM_CCER_CC4P);
267 /* Set capture/compare selection as output */
268 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x03 << TIM_CCMR2_CC4S);
269 /* Set output compare mode */
270 ✗ Timer_Handle->pTimer->CCMR2 &= ~(0x07 << TIM_CCMR2_OC4M);
271 ✗ Timer_Handle->pTimer->CCMR2 |= (OC_Handle.oc_mode << TIM_CCMR2_OC4M);
272 /* Set initial pulse value */
273 ✗ Timer_Handle->pTimer->CCR4 &= ~(0xFFFFFFFF);
274 ✗ Timer_Handle->pTimer->CCR4 |= OC_Handle.oc_pulse;
275 /* Enable preload */
276 ✗ Timer_Handle->pTimer->CCMR2 |= (OC_Handle.oc_preload << TIM_CCMR2_OC4PE);
277 /* Enable interrupt */
278 ✗ Timer_Handle->pTimer->DIER |= (1 << TIM_DIER_CC4IE);
279 /* Enable capture/compare 4 channel */
280 ✗ Timer_Handle->pTimer->CCER |= (1 << TIM_CCER_CC4E);
281 ✗ break;
282 ✗ default:
283 ✗ break;
284 }
285 }
286
287 ✗ void Timer_PerClkCtrl(Timer_Num_t timer_num, uint8_t en_or_di){
288
289 ✗ if(en_or_di == ENABLE){
290 ✗ switch(timer_num){
291 ✗ case TIMER1:
292 ✗ TIM1_PCLK_EN();
293 ✗ break;
294 ✗ case TIMER2:
295 ✗ TIM2_PCLK_EN();
296 ✗ break;
297 ✗ case TIMER3:
298 ✗ TIM3_PCLK_EN();
299 ✗ break;
300 ✗ case TIMER4:
301 ✗ TIM4_PCLK_EN();
302 ✗ break;
303 ✗ case TIMER5:
304 ✗ TIM5_PCLK_EN();
305 ✗ break;
306 ✗ case TIMER6:
307 ✗ TIM6_PCLK_EN();
308 ✗ break;
309 ✗ case TIMER7:
310 ✗ TIM7_PCLK_EN();
311 ✗ break;
312 ✗ case TIMER8:
313 ✗ TIM8_PCLK_EN();
314 ✗ break;
315 ✗ case TIMER9:
316 ✗ TIM9_PCLK_EN();
317 ✗ break;
318 ✗ case TIMER10:
319 ✗ TIM10_PCLK_EN();
320 ✗ break;
321 ✗ case TIMER11:
322 ✗ TIM11_PCLK_EN();
323 ✗ break;
324 ✗ case TIMER12:
325 ✗ TIM12_PCLK_EN();
326 ✗ break;
327 ✗ case TIMER13:
328 ✗ TIM13_PCLK_EN();
329 ✗ break;
330 ✗ case TIMER14:
331 ✗ TIM14_PCLK_EN();
332 ✗ break;
333 ✗ default:
334 ✗ break;
335 }
336 }
337 else{
338 ✗ switch(timer_num){
339 ✗ case TIMER1:
340 ✗ TIM1_PCLK_DI();
341 ✗ break;
342 ✗ case TIMER2:
343 ✗ TIM2_PCLK_DI();
344 ✗ break;
345 ✗ case TIMER3:
346 ✗ TIM3_PCLK_DI();
347 ✗ break;
348 ✗ case TIMER4:
349 ✗ TIM4_PCLK_DI();
350 ✗ break;
351 ✗ case TIMER5:
352 ✗ TIM5_PCLK_DI();
353 ✗ break;
354 ✗ case TIMER6:
355 ✗ TIM6_PCLK_DI();
356 ✗ break;
357 ✗ case TIMER7:
358 ✗ TIM7_PCLK_DI();
359 ✗ break;
360 ✗ case TIMER8:
361 ✗ TIM8_PCLK_DI();
362 ✗ break;
363 ✗ case TIMER9:
364 ✗ TIM9_PCLK_DI();
365 ✗ break;
366 ✗ case TIMER10:
367 ✗ TIM10_PCLK_DI();
368 ✗ break;
369 ✗ case TIMER11:
370 ✗ TIM11_PCLK_DI();
371 ✗ break;
372 ✗ case TIMER12:
373 ✗ TIM12_PCLK_DI();
374 ✗ break;
375 ✗ case TIMER13:
376 ✗ TIM13_PCLK_DI();
377 ✗ break;
378 ✗ case TIMER14:
379 ✗ TIM14_PCLK_DI();
380 ✗ break;
381 ✗ default:
382 ✗ break;
383 }
384 }
385 }
386
387 ✗ void Timer_IRQHandling(Timer_Handle_t* Timer_Handle){
388
389 /* Check if TIM update interrupt happened */
390 ✗ if(Timer_Handle->pTimer->SR & (1 << TIM_SR_UIF)){
391 /* Clear UIF bit in SR register */
392 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_UIF);
393 /* Call application callback */
394 ✗ Timer_ApplicationEventCallback(Timer_Handle->tim_num, TIMER_UIF_EVENT);
395 }
396
397 /* Check if capture/compare interrupt happened */
398 ✗ if(Timer_Handle->pTimer->SR & (1 << TIM_SR_CC1IF)){
399 /* Clear CC1IF bit in SR register */
400 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_CC1IF);
401 /* Call application callback */
402 ✗ Timer_ApplicationEventCallback(Timer_Handle->tim_num, TIMER_CC1IF_EVENT);
403 }
404 ✗ else if(Timer_Handle->pTimer->SR & (1 << TIM_SR_CC2IF)){
405 /* Clear CC2IF bit in SR register */
406 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_CC2IF);
407 /* Call application callback */
408 ✗ Timer_ApplicationEventCallback(Timer_Handle->tim_num, TIMER_CC2IF_EVENT);
409 }
410 ✗ else if(Timer_Handle->pTimer->SR & (1 << TIM_SR_CC3IF)){
411 /* Clear CC3IF bit in SR register */
412 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_CC3IF);
413 /* Call application callback */
414 ✗ Timer_ApplicationEventCallback(Timer_Handle->tim_num, TIMER_CC3IF_EVENT);
415 }
416 ✗ else if(Timer_Handle->pTimer->SR & (1 << TIM_SR_CC4IF)){
417 /* Clear CC4IF bit in SR register */
418 ✗ Timer_Handle->pTimer->SR &= ~(1 << TIM_SR_CC4IF);
419 /* Call application callback */
420 ✗ Timer_ApplicationEventCallback(Timer_Handle->tim_num, TIMER_CC4IF_EVENT);
421 }
422 else{
423 /* do nothing */
424 }
425 }
426
427 ✗ __attribute__((weak)) void Timer_ApplicationEventCallback(Timer_Num_t tim_num, Timer_Event_t timer_event){
428
429 /* This is a weak implementation. The application may override this function */
430 (void)tim_num;
431 (void)timer_event;
432 }
433