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/********************************************************************************************************//** |
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* @file spi_driver.c |
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* |
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* @brief File containing the APIs for configuring the SPI peripheral. |
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* |
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* Public Functions : |
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* - void SPI_Init(SPI_RegDef_t* pSPI_Handle) |
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* - void SPI_DeInit(SPI_RegDef_t* pSPIx) |
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* - void SPI_PerClkCtrl(SPI_RegDef_t* pSPIx, uint8_t en_or_di) |
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* - void SPI_SendData(SPI_RegDef_t* pSPIx, uint8_t* pTxBuffer, uint32_t len) |
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* - void SPI_ReceiveData(SPI_RegDef_t* pSPIx, uint8_t* pRxBuffer, uint32_t len) |
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* - uint8_t SPI_SendDataIT(SPI_Handle_t* pSPI_Handle, uint8_t* pTxBuffer, uint32_t len) |
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* - uint8_t SPI_ReceiveDataIT(SPI_Handle_t* pSPI_Handle, uint8_t* pRxBuffer, uint32_t len) |
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* - void SPI_IRQHandling(SPI_Handle_t* pSPI_Handle) |
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* - void SPI_Enable(SPI_RegDef_t *pSPIx, uint8_t en_or_di) |
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* - void SPI_SSICfg(SPI_RegDef_t* pSPIx, uint8_t en_or_di) |
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* - void SPI_SSOECfg(SPI_RegDef_t* pSPIx, uint8_t en_or_di) |
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* - uint8_t SPI_GetFlagStatus(SPI_RegDef_t* pSPIx, uint32_t flagname) |
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* - void SPI_ClearOVRFlag(SPI_RegDef_t* pSPIx) |
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* - void SPI_CloseTx(SPI_Handle_t* pSPI_Handle) |
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* - void SPI_CloseRx(SPI_Handle_t* pSPI_Handle) |
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* - void SPI_ApplicationEventCallback(SPI_Handle_t* pSPI_Handle, uint8_t app_event) |
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* |
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* @note |
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* For further information about functions refer to the corresponding header file. |
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**/ |
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#include <stdint.h> |
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#include <stddef.h> |
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#include "spi_driver.h" |
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/***********************************************************************************************************/ |
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/* Static Function Prototypes */ |
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/***********************************************************************************************************/ |
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/** |
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* @brief Function to handle transmission interrupt. |
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* @param[in] pSPI_Handle handle structure for the SPI peripheral. |
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* @return void |
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*/ |
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static void spi_txe_interrupt_handle(SPI_Handle_t* pSPI_Handle); |
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/** |
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* @brief Function to handle reception interrupt. |
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* @param[in] pSPI_Handle handle structure for the SPI peripheral. |
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* @return void |
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*/ |
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static void spi_rxne_interrupt_handle(SPI_Handle_t* pSPI_Handle); |
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/** |
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* @brief Function to handle error interrupt. |
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* @param[in] pSPI_Handle handle structure for the SPI peripheral. |
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* @return void |
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*/ |
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static void spi_ovr_err_interrupt_handle(SPI_Handle_t* pSPI_Handle); |
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/***********************************************************************************************************/ |
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/* Public API Definitions */ |
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/***********************************************************************************************************/ |
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void SPI_Init(SPI_Handle_t* pSPI_Handle){ |
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uint32_t temp = 0; |
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/* Enable the peripheral clock */ |
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SPI_PerClkCtrl(pSPI_Handle->pSPIx, ENABLE); |
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/* Configure the SPI_CR1 register */ |
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/* Configure the device mode */ |
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temp |= pSPI_Handle->SPIConfig.SPI_DeviceMode << SPI_CR1_MSTR; |
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/* Configure the bus config */ |
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if(pSPI_Handle->SPIConfig.SPI_BusConfig == SPI_BUS_CFG_FD){ |
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/* BIDI mode should be cleared */ |
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temp &= ~(1 << SPI_CR1_BIDI_MODE); |
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} |
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else if(pSPI_Handle->SPIConfig.SPI_BusConfig == SPI_BUS_CFG_HD){ |
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/* BIDI mode should be set */ |
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temp |= (1 << SPI_CR1_BIDI_MODE); |
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} |
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else if(pSPI_Handle->SPIConfig.SPI_BusConfig == SPI_BUS_CFG_S_RXONLY){ |
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/* BIDI mode should be cleared */ |
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temp &= ~(1 << SPI_CR1_BIDI_MODE); |
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/* RXONLY bit must be set */ |
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temp |= (1 << SPI_CR1_RXONLY); |
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} |
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/* Configure the SPI serial clock speed (baud rate) */ |
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temp |= pSPI_Handle->SPIConfig.SPI_SclkSpeed << SPI_CR1_BR; |
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/* Configure the DFF */ |
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temp |= pSPI_Handle->SPIConfig.SPI_DFF << SPI_CR1_DFF; |
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/* Configure the CPOL */ |
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temp |= pSPI_Handle->SPIConfig.SPI_CPOL << SPI_CR1_CPOL; |
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/* Configure the CPHA */ |
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temp |= pSPI_Handle->SPIConfig.SPI_CPHA << SPI_CR1_CPHA; |
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/* Configure the SSM */ |
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temp |= pSPI_Handle->SPIConfig.SPI_SSM << SPI_CR1_SSM; |
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pSPI_Handle->pSPIx->CR1 = temp; |
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} |
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void SPI_DeInit(SPI_RegDef_t* pSPIx){ |
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if(pSPIx == SPI1){ |
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SPI1_REG_RESET(); |
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} |
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else if(pSPIx == SPI2){ |
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SPI2_REG_RESET(); |
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} |
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else if(pSPIx == SPI3){ |
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SPI3_REG_RESET(); |
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} |
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else if(pSPIx == SPI4){ |
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SPI4_REG_RESET(); |
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} |
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else{ |
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/* do nothing */ |
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} |
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} |
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void SPI_PerClkCtrl(SPI_RegDef_t* pSPIx, uint8_t en_or_di){ |
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if(en_or_di == ENABLE){ |
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if(pSPIx == SPI1){ |
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SPI1_PCLK_EN(); |
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} |
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else if(pSPIx == SPI2){ |
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SPI2_PCLK_EN(); |
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} |
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else if(pSPIx == SPI3){ |
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SPI3_PCLK_EN(); |
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} |
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else if(pSPIx == SPI4){ |
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SPI4_PCLK_EN(); |
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} |
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else{ |
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/* do nothing */ |
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} |
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} |
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else{ |
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if(pSPIx == SPI1){ |
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SPI1_PCLK_DI(); |
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} |
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else if(pSPIx == SPI2){ |
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SPI2_PCLK_DI(); |
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} |
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else if(pSPIx == SPI3){ |
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SPI3_PCLK_DI(); |
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} |
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else if(pSPIx == SPI4){ |
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SPI4_PCLK_DI(); |
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} |
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else{ |
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/* do nothing */ |
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} |
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} |
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} |
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void SPI_SendData(SPI_RegDef_t* pSPIx, uint8_t* pTxBuffer, uint32_t len){ |
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while(len > 0){ |
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/* Wait until TXE is set */ |
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while(SPI_GetFlagStatus(pSPIx, SPI_TXE_FLAG) == FLAG_RESET); |
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/* Check the DFF bit in CR1 */ |
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if((pSPIx->CR1 & (1 << SPI_CR1_DFF))){ |
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/* 16 bit DFF */ |
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/* Load the data into the DR */ |
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pSPIx->DR = *((uint16_t*)pTxBuffer); |
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len--; |
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len--; |
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(uint16_t*)pTxBuffer++; |
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} |
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else{ |
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/* 8 bit DFF */ |
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pSPIx->DR = *pTxBuffer; |
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len--; |
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pTxBuffer++; |
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} |
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} |
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} |
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void SPI_ReceiveData(SPI_RegDef_t* pSPIx, uint8_t* pRxBuffer, uint32_t len){ |
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while(len > 0){ |
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/* Wait until TXE is set */ |
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while(SPI_GetFlagStatus(pSPIx, SPI_RXNE_FLAG) == FLAG_RESET); |
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/* Check the DFF bit in CR1 */ |
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if((pSPIx->CR1 & (1 << SPI_CR1_DFF))){ |
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/* 16 bit DFF */ |
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/* Load the data from DR to RxBuffer address*/ |
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*((uint16_t*)pRxBuffer) = pSPIx->DR; |
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len--; |
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len--; |
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(uint16_t*)pRxBuffer++; |
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} |
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else{ |
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/* 8 bit DFF */ |
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*pRxBuffer = pSPIx->DR; |
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len--; |
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pRxBuffer++; |
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} |
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} |
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} |
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uint8_t SPI_SendDataIT(SPI_Handle_t* pSPI_Handle, uint8_t* pTxBuffer, uint32_t len){ |
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uint8_t state = pSPI_Handle->TxState; |
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if(state != SPI_BUSY_IN_TX){ |
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/* Save the Tx buffer address and length information */ |
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pSPI_Handle->pTxBuffer = pTxBuffer; |
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pSPI_Handle->TxLen = len; |
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/* Mark the SPI state as busy in transmission so that no other code can take over |
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* same SPI peripheral until transmission is over */ |
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pSPI_Handle->TxState = SPI_BUSY_IN_TX; |
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/* Enable the TXEIE control bit to get interrupt whenever TXE flag is set in SR */ |
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pSPI_Handle->pSPIx->CR2 |= (1 << SPI_CR2_TXEIE); |
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} |
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return state; |
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} |
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uint8_t SPI_ReceiveDataIT(SPI_Handle_t* pSPI_Handle, uint8_t* pRxBuffer, uint32_t len){ |
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uint8_t state = pSPI_Handle->RxState; |
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| 233 |
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if(state != SPI_BUSY_IN_RX){ |
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/* Save the Rx buffer address and length information */ |
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pSPI_Handle->pRxBuffer = pRxBuffer; |
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pSPI_Handle->RxLen = len; |
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/* Mark the SPI state as busy in reception so that no other code can take over |
| 239 |
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* same SPI peripheral until reception is over */ |
| 240 |
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pSPI_Handle->RxState = SPI_BUSY_IN_RX; |
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| 242 |
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/* Enable the RXEIE control bit to get interrupt whenever RXE flag is set in SR */ |
| 243 |
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pSPI_Handle->pSPIx->CR2 |= (1 << SPI_CR2_RXNEIE); |
| 244 |
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} |
| 245 |
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| 246 |
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✗ |
return state; |
| 247 |
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} |
| 248 |
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void SPI_IRQHandling(SPI_Handle_t* pSPI_Handle){ |
| 250 |
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| 251 |
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uint8_t temp1, temp2; |
| 252 |
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| 253 |
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/* Check for TXE */ |
| 254 |
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✗ |
temp1 = pSPI_Handle->pSPIx->SR & (1 << SPI_SR_TXE); |
| 255 |
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✗ |
temp2 = pSPI_Handle->pSPIx->CR2 & (1 << SPI_CR2_TXEIE); |
| 256 |
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| 257 |
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✗ |
if(temp1 && temp2){ |
| 258 |
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/* Handle TXE */ |
| 259 |
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spi_txe_interrupt_handle(pSPI_Handle); |
| 260 |
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} |
| 261 |
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| 262 |
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/* Check for RXNE */ |
| 263 |
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✗ |
temp1 = pSPI_Handle->pSPIx->SR & (1 << SPI_SR_RXNE); |
| 264 |
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temp2 = pSPI_Handle->pSPIx->CR2 & (1 << SPI_CR2_RXNEIE); |
| 265 |
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| 266 |
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✗ |
if(temp1 && temp2){ |
| 267 |
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/* Handle RXE */ |
| 268 |
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✗ |
spi_rxne_interrupt_handle(pSPI_Handle); |
| 269 |
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} |
| 270 |
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| 271 |
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/* Check for OVR flag */ |
| 272 |
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✗ |
temp1 = pSPI_Handle->pSPIx->SR & (1 << SPI_SR_OVR); |
| 273 |
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✗ |
temp2 = pSPI_Handle->pSPIx->CR2 & (1 << SPI_CR2_ERRIE); |
| 274 |
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| 275 |
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✗ |
if(temp1 && temp2){ |
| 276 |
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/* Handle OVR error */ |
| 277 |
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✗ |
spi_ovr_err_interrupt_handle(pSPI_Handle); |
| 278 |
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} |
| 279 |
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} |
| 280 |
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| 281 |
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✗ |
void SPI_Enable(SPI_RegDef_t *pSPIx, uint8_t en_or_di){ |
| 282 |
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| 283 |
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✗ |
if(en_or_di == ENABLE){ |
| 284 |
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✗ |
pSPIx->CR1 |= (1 << SPI_CR1_SPE); |
| 285 |
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} |
| 286 |
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else{ |
| 287 |
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✗ |
pSPIx->CR1 &= ~(1 << SPI_CR1_SPE); |
| 288 |
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} |
| 289 |
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} |
| 290 |
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| 291 |
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✗ |
void SPI_SSICfg(SPI_RegDef_t* pSPIx, uint8_t en_or_di){ |
| 292 |
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| 293 |
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✗ |
if(en_or_di == ENABLE){ |
| 294 |
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✗ |
pSPIx->CR1 |= (1 << SPI_CR1_SSI); |
| 295 |
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} |
| 296 |
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else{ |
| 297 |
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✗ |
pSPIx->CR1 &= ~(1 << SPI_CR1_SSI); |
| 298 |
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} |
| 299 |
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} |
| 300 |
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| 301 |
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✗ |
void SPI_SSOECfg(SPI_RegDef_t* pSPIx, uint8_t en_or_di){ |
| 302 |
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| 303 |
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✗ |
if(en_or_di == ENABLE){ |
| 304 |
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✗ |
pSPIx->CR2 |= (1 << SPI_CR2_SSOE); |
| 305 |
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} |
| 306 |
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else{ |
| 307 |
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✗ |
pSPIx->CR2 &= ~(1 << SPI_CR2_SSOE); |
| 308 |
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} |
| 309 |
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} |
| 310 |
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| 311 |
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✗ |
uint8_t SPI_GetFlagStatus(SPI_RegDef_t* pSPIx, uint32_t flagname){ |
| 312 |
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| 313 |
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✗ |
if(pSPIx->SR & flagname){ |
| 314 |
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✗ |
return FLAG_SET; |
| 315 |
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} |
| 316 |
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✗ |
return FLAG_RESET; |
| 317 |
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} |
| 318 |
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| 319 |
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✗ |
void SPI_ClearOVRFlag(SPI_RegDef_t* pSPIx){ |
| 320 |
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| 321 |
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uint8_t temp; |
| 322 |
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✗ |
temp = pSPIx->DR; |
| 323 |
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✗ |
temp = pSPIx->SR; |
| 324 |
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(void)temp; |
| 325 |
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} |
| 326 |
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| 327 |
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✗ |
void SPI_CloseTx(SPI_Handle_t* pSPI_Handle){ |
| 328 |
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| 329 |
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✗ |
pSPI_Handle->pSPIx->CR2 &= ~(1 << SPI_CR2_TXEIE); |
| 330 |
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✗ |
pSPI_Handle->pTxBuffer = NULL; |
| 331 |
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✗ |
pSPI_Handle->TxLen = 0; |
| 332 |
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✗ |
pSPI_Handle->TxState = SPI_READY; |
| 333 |
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} |
| 334 |
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| 335 |
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✗ |
void SPI_CloseRx(SPI_Handle_t* pSPI_Handle){ |
| 336 |
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| 337 |
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✗ |
pSPI_Handle->pSPIx->CR2 &= ~(1 << SPI_CR2_RXNEIE); |
| 338 |
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✗ |
pSPI_Handle->pRxBuffer = NULL; |
| 339 |
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✗ |
pSPI_Handle->RxLen = 0; |
| 340 |
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✗ |
pSPI_Handle->RxState = SPI_READY; |
| 341 |
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} |
| 342 |
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| 343 |
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__attribute__((weak)) void SPI_ApplicationEventCallback(SPI_Handle_t* pSPI_Handle, uint8_t app_event){ |
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/* This is a weak implementation. The application may override this function */ |
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(void)pSPI_Handle; |
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(void)app_event; |
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} |
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/***********************************************************************************************************/ |
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/* Static Function Definitions */ |
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/***********************************************************************************************************/ |
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static void spi_txe_interrupt_handle(SPI_Handle_t* pSPI_Handle){ |
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/* Check the DFF bit in CR1 */ |
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if((pSPI_Handle->pSPIx->CR1 & (1 << SPI_CR1_DFF))){ |
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/* 16 bit DFF */ |
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/* Load the data from DR to RxBuffer address*/ |
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pSPI_Handle->pSPIx->DR = *((uint16_t*)pSPI_Handle->pTxBuffer); |
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pSPI_Handle->TxLen--; |
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pSPI_Handle->TxLen--; |
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(uint16_t*)pSPI_Handle->pRxBuffer++; |
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} |
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else{ |
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/* 8 bit DFF */ |
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pSPI_Handle->pSPIx->DR = *pSPI_Handle->pTxBuffer; |
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pSPI_Handle->TxLen--; |
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pSPI_Handle->pRxBuffer++; |
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} |
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if(!pSPI_Handle->TxLen){ |
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/* Close SPI transmission */ |
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/* TX is over */ |
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/* Prevents interrupts from setting up of TXE flag */ |
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SPI_CloseTx(pSPI_Handle); |
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SPI_ApplicationEventCallback(pSPI_Handle, SPI_EVENT_TX_CMPLT); |
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} |
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} |
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static void spi_rxne_interrupt_handle(SPI_Handle_t* pSPI_Handle){ |
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/* Check the DFF bit in CR1 */ |
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if((pSPI_Handle->pSPIx->CR1 & (1 << SPI_CR1_DFF))){ |
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/* 16 bit DFF */ |
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/* Load the data from DR to RxBuffer address*/ |
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*((uint16_t*)pSPI_Handle->pRxBuffer) = (uint16_t)pSPI_Handle->pSPIx->DR; |
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pSPI_Handle->RxLen -= 2; |
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pSPI_Handle->pRxBuffer--; |
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pSPI_Handle->pRxBuffer--; |
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} |
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else{ |
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/* 8 bit DFF */ |
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*(pSPI_Handle->pRxBuffer) = (uint8_t)pSPI_Handle->pSPIx->DR; |
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pSPI_Handle->RxLen--; |
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pSPI_Handle->pRxBuffer--; |
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} |
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if(!pSPI_Handle->RxLen){ |
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/* RX is complete */ |
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SPI_CloseRx(pSPI_Handle); |
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SPI_ApplicationEventCallback(pSPI_Handle, SPI_EVENT_RX_CMPLT); |
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} |
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} |
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static void spi_ovr_err_interrupt_handle(SPI_Handle_t* pSPI_Handle){ |
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uint8_t temp; |
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/* Clear the OVR flag */ |
| 411 |
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if(pSPI_Handle->TxState != SPI_BUSY_IN_TX){ |
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temp = pSPI_Handle->pSPIx->DR; |
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temp = pSPI_Handle->pSPIx->SR; |
| 414 |
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(void)temp; |
| 415 |
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} |
| 416 |
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| 417 |
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/* Inform the application */ |
| 418 |
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SPI_ApplicationEventCallback(pSPI_Handle, SPI_EVENT_OVR_ERR); |
| 419 |
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} |
| 420 |
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